1. Field of the Invention
The present invention relates to an image processing apparatus, and more particularly to digital signal processing from image processing apparatus.
2. Related Background Art
FIGS. 8A and 8B are block diagrams of conventional constructions of apparatuses for processing sequential color difference line signals, e.g., signal processing circuits in a still video system, respectively showing the construction for brilliance signals and the construction for chrominance signals. In FIG. 8A reference numeral 800 designates an input terminal for a brilliance signal reproduced from a magnetic sheet which is a magnetic recording medium; 802, a delay line of 1H (1 horizontal scanning time); 804, a switch for selecting a reproduced brilliance signal of the input terminal 800 or a delay signal of the delay line 802; 806, an adder for adding the output of the switch 804 and the output of the delay line 802 and for taking an average; 808, a delay line of 1/2H; 810, a switch for selecting the output of the delay line 802 or the output of the delay line 808; and 812, an output terminal for the signal selected by the switch 810.
In FIG. 8B, 814 designates an input terminal for reproduction line sequential chrominance signals reproduced from the magnetic sheet; 816, a delay line of 1/2H; 818, a switch for selecting the reproduction line sequential chrominance signals or the output of the delay line 816; 820, 822, delay lines of 1H; 824, a switch for selecting the output of the switch 818 or the output of the delay line 822; 826, an adder for adding the output of the switch 824 and the output of the delay line 822 and for taking an average; 828, 830, switches for selecting the output of the delay line 820 or the output of the adder 826; and 832, 834, output terminals for the signals selected by the switches 828, 830.
The reproduced brilliance signals to be inputted to the input terminal 800 are represented by Y0, Y1, Y2, Y3, Y4, Y5, . . . orderly raster by raster. The switch 804 normally selects the input terminal 800, and it shifts to the output of the delay line 802 when a drop-out occurs in the reproduction signal. The adder 806 adds the output of the switch 804 and the output of the delay line 802 and takes an average, and outputs (Y0+Y1)/2, (Y1+Y2)/2, (Y2+Y3)/2, (Y3+Y4)/2, (Y4+Y5)/2, . . . When a frame picture on the magnetic sheet is to be reproduced, the switch 810 normally selects the output of the delay line 802; when a field picture is to be reproduced, the switch 810 shifts field by field.
The reproduction line sequential chrominance signals to be inputted to the input terminal 814 are represented by RY0, BY1, RY2, BY3, RY4, BY5, RY6, By7, . . . orderly raster by raster. The switch 824 normally selects the output of switch 818, and it shifts to select the output of the delay line 822 when a drop-out occurs. The adder 826 adds the output of the delay line 822 and the output of the switch 824 and takes an average, and outputs (RY0+RY2)/2, (BY1+BY3)/2, (RY2+RY4)/2, (BY3+BY5)/2, (RY4+RY6)/2, (BY5+BY7)/2, . . . By the shifting of the switches 828, 830, RY0, (RY0+RY2)/2, RY2, (RY2+RY4)/2, RY4, (RY4+RY6)/2, RY6, . . . are outputted to the output terminal 832, and 1H later from this, BY1, (BY1+BY3)/2, BY3, (BY3+BY5)/2, BY5, (BY5+BY7)/2, BY7, . . . are outputted to the output terminal 834. When a frame picture on the magnetic sheet is to be reproduced, the switch 818 normally selects the input terminal 814; when a field picture is to be reproduced, the switch 818 shifts field by field.
However, with this conventional arrangement, since many delay lines 802, 808, 816, 820, 822 are included, the number of parts to be adjusted at the stage of production or assembly would be increased. Secularly, the temperature characteristics, frequency characteristics, and S/N ratio of these delay lines would be varied and impaired. Further, the system furnished with image memories requires relatively large-sized circuits.
Conventionally, in an image recording and reproducing system having an image memory, when memorizing in the image memory an input image as reduced, the frequency of a clock, for forming a horizontal address signal to be impressed in the image memory, is divided by N (N is a positive integer), and the frequency of a horizontal synchronizing signal, for generating a vertical address signal, is divided by M/M (M is a positive integer). By this process, the input signal is reduced to 1/N horizontally and to 1/M vertically, and as a result, a reduced image of a 1/Nxc3x971/M size is memorized in the image memory.
However, in the conventional apparatus, an input image is memorized in the image memory simply by cutting out. Accordingly, in a still video system for processing chrominance signals in line sequence, when reducing the input image to a xc2xcxc3x97xc2xc size, for example, if the input image starts with R-Y components, i.e. RY0, BY1, RY2, BY3, RY4, BY5, RY6, BY7, RY8, BY9, RY10, BY11, . . . every fourth raster is sampled. As a result, only R-Y components, i.e. RY0, RY4, RY8, . . . are stored in the image memory, while B-Y components are completely omitted.
Further, when reducing the input image to a ⅕xc3x97⅕ size, every fifth rasters, i.e. RY0, BY5, RY10, . . . is memorized in the image memory and, as a result, other color different information is omitted in part. However, in the case where a lot of image information as reduced was stored in the image memory for the purpose of multi-screen display, because there is no priority between chrominance signals to be inputted, a single raster necessarily contains R-Y components and B-Y components in combination, which is very difficult to read out to output normally.
Especially when memorizing an input image, as reduced, in the image memory, the input image is written in the image memory with image areas of the input image reduced. Therefore, as shown in FIG. 10, if the reduced image is stored in a checked fashion, the image can be displayed only incompletely on a monitor screen; that is, part of the reduced image is omitted.
Another problem with the conventional arrangement is that when overlapping the reduced and memorized image over an input image, it requires, in addition to a signal indicative of an image zone of the reduced image, a signal indicative of a frame zone where the reduced image is to be framed.
Moreover, in the conventional image recording and reproducing system, when a framed image of a reproduction video signal from the magnetic recording medium is to be memorized in the image memory while a stationary image is being read out as the framed image from the image memory, the relationship between the field of an image outputted from the image memory and the field of an image inputted into the image memory has not been considered. Thus the reproduction video signal is merely written in the image memory.
However, if the field of an image outputted from the image memory does not coincide with the field of an input image (reproduction video signal) when a framed image from the magnetic recording medium is to be reproduced to store in the image memory, a skew distortion in the output image would occur during that time.
Yet if the two same fields of image signals are inputted in a frame memory and then are read out the field video signals one after another, a skew distortion would still occur due to the inconsistence of the fields.
Heretofore, as a means for processing video signals, a clamping circuit generally called xe2x80x9cclampxe2x80x9d is known.
Generally, in the apparatus furnished with an image memory, any DC component of an input video signal is cut off by a condenser prior to using this video signal. But, for example, if the input video signal is to be stored in the image memory, the size of the cut-off DC components is one of the significant factors. This is the reason why a clamping process is necessary.
FIG. 9 illustrates a conventional clamping circuit, in which; reference numeral 900 designates an input terminal for an analog video signal; 902, a control terminal for impressing a clamp pulse; and 904, an output terminal for a clamped signal. An output signal from the output terminal 904 is normally supplied to an A/D converter (not shown). An video signal to be inputted to the input terminal 900 is amplified in terms of current by a transistor 906, and any DC component of the signal are cut off by a condenser 908. When a clamp pulse to be impressed to the control terminal 902 is xe2x80x9chigh levelxe2x80x9d, a constant potential to be determined according to a constant-voltage diode 910 appears at a base of the transistor 912; and when it is xe2x80x9clow levelxe2x80x9d, the potential is held by the condenser 908. Thus the signal from the output signal 904 is clamped in the potential as determined according to the constant-voltage diode 910.
The foregoing conventional apparatus has the following problems. Considering that an clamp output is to be A/D-converted and stored in the image memory, if an offset adjustment is not made in 1 LSB unit when the video component of an input video signal is zero (nil), an error would occur between a brilliance signal and a chrominance signal or between red, green and blue color signals. It is very difficult to eliminate such error, requiring a high-precision adjustment. Further, because the clamping speed is low, it is impossible to make a clamp in one raster unit.
In recording an input video signal from the exterior in the magnetic recording medium as a field image, one field of the input video signal is recorded as it is, and the recorded one field is read out repeatedly. Therefore, the other field of image information is omitted, and as a result, any oblique line of the image would be in a stepped or jogged shape, causing a lack of easiness or smoothness in the image so that the image is difficult to see well.
It is therefore an object of the present invention to provide an image memorizing apparatus which can eliminate the foregoing problems collectively or individually.
Another object of the invention is to provide an image memorizing apparatus which can eliminate the foregoing problems collectively or individually by employing an image memory.
Still another object of the invention is to provide an image memorizing apparatus which can realize a reproducing process by utilizing an image memory effectively.
According to the present invention, there is provided an image memorizing apparatus in which from an image memory, a normal reading-out is made with respect to one field, and two adjacent rasters are read out at the same time with respect to the other raster to output a sum and an average.
A further object of the invention is to provide an image memorizing apparatus in which two chrominance data can be stored neither more or less when memorizing an image, as reduced, in the image memory.
A still further object of the invention is to provide an image memorizing apparatus in which a given image signal can be framed by employing an image memory.
An additional object of the invention is to provide an image memorizing apparatus comprising a new clamp circuit which has been advanced over the conventional clamp circuit.
A still additional object of the invention to provide an image memorizing apparatus in which the occurrance of a skew distortion can be prevented by employing an image memory.
Many other objects, advantages and features of the present invention will become manifest to those versed in the art upon making reference to the following detailed description and the accompanying drawings in which an embodiment incorporating the principles of the present invention is shown by way of illustrative example.